LTC2900_技术文档

LTC2960

36V Nano-Current

Two Input Voltage Monitor

FEATURES

DESCRIPTION

The LTC^®2960 is a nano-current, high voltage two input

voltage monitor, ideally suited for multicell battery ap-

plications. External resistive dividers configure custom

comparator thresholds. The supervisory circuit monitors

the ADJ input and pulls the RST output low when the input

drops below threshold. A reset timeout period delays the

return of the RST output to a high state when the input

rises above the threshold. The spare comparator allows

voltageconditionstobedetectedwitheitheranon-inverting

n

850nA Quiescent Current

n

Operating Range: 2.5V < V < 36V

CC

n

1.5% (Max) Accuracy Over Temperature

n

Adjustable Reset Threshold

n

Wide Temperature Range (–40°C to 125°C)

+

–

n

Adjustable IN /IN Threshold

Manual Reset Input

Compact 2mm × 2mm 8-lead DFN and

TSOT-23 (ThinSOT™) Packages

+

input, IN (LTC2960-1/LTC2960-3) or an inverting input,

APPLICATIONS

–

IN (LTC2960-2/LTC2960-4). A manual reset (MR) input

is provided for external activation of the reset output.

n

Portable Equipment

n

Battery Powered Equipment

Other options provided on the LTC2960-1/LTC2960-2 in-

cludearesettimeoutperiodselectpin,RT,toselectbetween

15ms or 200ms reset timeout periods. The LTC2960-3/

LTC2960-4 have a fixed 200ms reset timeout period. The

RST and OUT outputs are available with active pull-up cir-

cuitstoanoutputlogicsupplypin(LTC2960-3/LTC2960-4)

or 36V open-drain outputs (LTC2960-1/LTC2960-2).

n

Security Systems

Automotive Systems

n

LTC2960 Option Table

Option

Inputs

Reset Timeout Period

15ms/200ms

200ms

Output Type

36V Open-Drain

Active Pull-up

+

LTC2960-1

LTC2960-2

LTC2960-3

LTC2960-4

ADJ/IN

–

+

–

L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and

ThinSOT is a trademark of Linear Technology Corporation. All other trademarks are the property

of their respective owners.

200ms

TYPICAL APPLICATION

Battery and Regulator Monitor

Supply Current vs Supply Voltage

1200

6V < V < 8.4V

IN

MR=5V, 27C

V

OUT

LTC3632

1.8V

DC/DC

Li-Ion

4.2V

+

R2

R4

900

600

300

0

6.04M

1.3M

GND

C1

0.1μF

50V

C2

1μF

LTC2960-3

V

DV

CC

+

IN

RST

RESET

LOW BATTERY

R1

402k

Li-Ion

4.2V

OUT

ADJ

+

MR

GND

R3

402k

2960 TA01

0

8

16

V

24

(V)

32

40

CC

POWER-FAIL FALLING THRESHOLD = 6.410V

RESET FALLING THRESHOLD = 1.693V

2960 TA01a

2960f

1

LTC2960

ABSOLUTE MAXIMUM RATINGS

(Notes 1 & 2)

Input Voltages

Average Currents

RST, OUT ........................................................... 5mA

Operating Ambient Temperature Range

V , RT, MR .......................................... –0.3V to 40V

CC

DV ........................................................ –0.3V to 6V

CC

+

–

ADJ, IN , IN ......................................... –0.3V to 3.5V

Output Voltages (LTC2960-1/LTC2960-2)

LTC2960C................................................ 0°C to 70°C

LTC2960I.............................................–40°C to 85°C

LTC2960H.......................................... –40°C to 125°C

Storage Temperature Range .................. –65°C to 150°C

Lead Temperature (Soldering, 10 sec)

RST, OUT ............................................... –0.3V to 40V

Output Voltages (LTC2960-3/LTC2960-4)

RST, OUT (DV ≥1.6V)......... –0.3V to (DV + 0.3V)

RST, OUT (DV = GND) ....................... –0.3V to 6.3V

CC

TSOT-23 Package .............................................300°C

CC

PIN CONFIGURATION

TOP VIEW

+

–

1

2

3

4

8

7

6

5

IN /IN

TOP VIEW

V

CC

+

–

RT/DV

ADJ

MR

IN /IN

1

8 V

CC

9

ADJ 2

MR 3

GND 4

7 RT/DV

6 RST

CC

RST

OUT

GND

5 OUT

DC8 PACKAGE

8-LEAD (2mm × 2mm) PLASTIC DFN

TS8 PACKAGE

8-LEAD PLASTIC TSOT-23

T

= 150°C, θ = 195°C/W

JA

T

= 150°C, θ = 80.6°C/W

JA

JMAX

EXPOSED PAD (PIN 9) PCB GND

CONNECTION OPTIONAL

ORDER INFORMATION

Lead Free Finish

TAPE AND REEL (MINI)

LTC2960CDC-1#TRMPBF LTC2960CDC-1#TRPBF

LTC2960IDC-1#TRMPBF LTC2960IDC-1#TRPBF

TAPE AND REEL

PART MARKING

LFZZ

PACKAGE DESCRIPTION

TEMPERATURE RANGE

0°C to 70°C

8-Lead (2mm × 2mm) Plastic DFN

LFZZ

–40°C to 85°C

–40°C to 125°C

0°C to 70°C

LTC2960HDC-1#TRMPBF LTC2960HDC-1#TRPBF

LTC2960CDC-2#TRMPBF LTC2960CDC-2#TRPBF

LFZZ

LGBC

LFSF

LTC2960IDC-2#TRMPBF

LTC2960IDC-2#TRPBF

–40°C to 85°C

–40°C to 125°C

0°C to 70°C

LTC2960HDC-2#TRMPBF LTC2960HDC-2#TRPBF

LTC2960CDC-3#TRMPBF LTC2960CDC-3#TRPBF

LTC2960IDC-3#TRMPBF

LTC2960IDC-3#TRPBF

LFSF

–40°C to 85°C

–40°C to 125°C

0°C to 70°C

LTC2960HDC-3#TRMPBF LTC2960HDC-3#TRPBF

LTC2960CDC-4#TRMPBF LTC2960CDC-4#TRPBF

LFSF

LGBF

LTC2960IDC-4#TRMPBF

LTC2960IDC-4#TRPBF

LGBF

–40°C to 85°C

–40°C to 125°C

LTC2960HDC-4#TRMPBF LTC2960HDC-4#TRPBF

LGBF

2960f

2

LTC2960

ORDER INFORMATION

Lead Free Finish

TAPE AND REEL (MINI)

LTC2960CTS8-1#TRMPBF LTC2960CTS8-1#TRPBF LTFZY

LTC2960ITS8-1#TRMPBF LTC2960ITS8-1#TRPBF LTFZY

TAPE AND REEL

PART MARKING

PACKAGE DESCRIPTION

8-Lead Plastic TSOT-23

TEMPERATURE RANGE

0°C to 70°C

–40°C to 85°C

–40°C to 125°C

0°C to 70°C

LTC2960HTS8-1#TRMPBF LTC2960HTS8-1#TRPBF LTFZY

LTC2960CTS8-2#TRMPBF LTC2960CTS8-2#TRPBF LTGBB

LTC2960ITS8-2#TRMPBF LTC2960ITS8-2#TRPBF

LTGBB

–40°C to 85°C

–40°C to 125°C

0°C to 70°C

LTC2960HTS8-2#TRMPBF LTC2960HTS8-2#TRPBF LTGBB

LTC2960CTS8-3#TRMPBF LTC2960CTS8-3#TRPBF LTFSD

LTC2960ITS8-3#TRMPBF LTC2960ITS8-3#TRPBF

LTFSD

–40°C to 85°C

–40°C to 125°C

0°C to 70°C

LTC2960HTS8-3#TRMPBF LTC2960HTS8-3#TRPBF LTFSD

LTC2960CTS8-4#TRMPBF LTC2960CTS8-4#TRPBF LTGBD

LTC2960ITS8-4#TRMPBF LTC2960ITS8-4#TRPBF

LTGBD

–40°C to 85°C

–40°C to 125°C

LTC2960HTS8-4#TRMPBF LTC2960HTS8-4#TRPBF LTGBD

Consult LTC Marketing for parts specified with wider operating temperature ranges.

Consult LTC Marketing for information on non-standard lead based finish parts.

For more information on lead free part marking, go to: http://www.linear.com/leadfree/

For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/

ELECTRICAL CHARACTERISTICS ^Thel denotes specifications that apply over the full operating temperature

range, otherwise specifications are at T_A= 25°C, V_CC= 7V, DV_CC= 3.3V unless otherwise noted (Note 2).

SYMBOL PARAMETER

CONDITIONS

MIN

2.5

TYP

MAX

36

UNITS

l

V

Input Supply Operating Range

V

CC

V

Undervoltage Lockout

Undervoltage Lockout Hysteresis

V Rising

CC

1.85

2.3

V

mV

UVLO

CC

100

l

I

CC

V

Input Supply Current

MR = 5V, V = 36V, –40°C ≤ T ≤ 85°C

400

850

1250

2000

nA

CC

A

MR = 5V, V = 36V, –40°C ≤ T ≤ 125°C

CC

A

l

DV

DV Input Supply Operating Range

1.6

5.5

50

V

CC

I

DV Input Current

CC

RST = OUT = LOW DV = 5.5V

nA

DVCC

CC

+

–

THRESHOLD ADJUSTMENT INPUTS: ADJ, IN /IN

+

l

V

ADJ/IN Input Threshold

Monitored Voltage Falling

Monitored Voltage Rising

394

400

406

mV

TH

–

IN Input Threshold

+

–

l

V

ADJ to IN /IN Threshold Matching

ADJ Threshold Hysteresis

2

10

6

15

mV

μs

THM

Monitored Voltage Rising

Monitored Voltage Falling

8

RHYS

+

IN Threshold Hysteresis

18

80

20

25

HYS

–

IN Threshold Hysteresis

20

25

HYS

t

I

Under Voltage Detect to RST, OUT Falling

V = V –40mV

170

500

UV

TH(LKG)

TH

l

Input Leakage Current

V = 420mV, –40°C≤ T ≤ 85°C

0.1

1

10

nA

A

V = 420mV, –40°C ≤T ≤ 125°C

A

2960f

3

LTC2960

ELECTRICAL CHARACTERISTICS ^Thel denotes specifications that apply over the full operating temperature

range, otherwise specifications are at T_A= 25°C, V_CC= 7V, DV_CC= 3.3V unless otherwise noted (Note 2).

SYMBOL PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

CONTROL INPUTS: MR, RT

l

V

Control Input Threshold RT

Control Input Threshold MR

MR Minimum Detectable Pulse Width

Propagation Delay to RST Falling

Manual Reset Open Voltage

Manual Reset Low Current

Input Leakage Current

0.4

20

1.4

V

RT

MR

t

μs

V

PW

PD

Manual Reset Falling

1

7

20

4

V

MR Open, MR Load = 100nA

2.6

–0.35

MR

I

MR = 400mV, V ≥ 2.5V

–1

–3

μA

MR

LK

CC

l

RT = 15V

MR = 15V

100

nA

STATUS OUTPUTS: RST, OUT

l

V

OL

Voltage Output Low

V

CC

V

CC

= 1.2V, I = 10μA (LTC2960-1/LTC2960-3)

= 3V, I = 500μA

25

100

400

mV

l

V

Voltage Output High

I = –100μA (LTC2960-3/LTC2960-4)

0.7•DV

V

OH

CC

l

I

Leakage Current, Output High

V = 5.5V

50

100

50

nA

OH

V = 15V (LTC2960-1/LTC2960-2)

V = 5.5V, DV = GND

CC

l

I

t

Output Short-Circuit Current

Reset Timeout Period

RST = GND DV = 6V (LTC2960-3/ LTC2960-4)

0.8

3

mA

SC

CC

OUT = GND DV = 6V (LTC2960-3/ LTC2960-4)

CC

l

LTC2960-3/LTC2960-4

RT Input High

RT Input Low

140

10

200

15

280

25

ms

RST

Note 1: Stresses beyond those listed under Absolute Maximum Ratings

may cause permanent damage to the device. Exposure to any Absolute

Maximum Rating condition for extended periods may affect device

reliability and lifetime.

Note 2. All currents into pins are positive; all voltages are referenced to

GND unless otherwise noted.

TYPICAL PERFORMANCE CHARACTERISTICS

Supply Current vs Supply Voltage

MR Current vs MR Voltage

Supply Current vs MR Voltage

1500

1200

900

600

300

0

1.2

1.0

0.8

0.6

0.4

0.2

0

2.5

2.0

1.5

1.0

0.5

0

V

= 7V

CC

125°C

90°C

V

= 7V

CC

V

= 2.5V

CC

27°C

–45°C

V

= 2.5V

CC

2

0

8

16

24

32

40

0

1

2

3

4

5

1

3

4

5

0

V

(V)

MR VOLTAGE (V)

CC

2960 G01

2960 G02

2960 G03

2960f

4

LTC2960

TYPICAL PERFORMANCE CHARACTERISTICS

MR Rising Threshold/Open

Voltage vs V_CC

Normalized Reset Timeout Period

vs Temperature

Comparator Overvoltage/

Undervoltage Glitch Immunity

1.3

1.2

1.1

1.0

0.9

0.8

0.7

4.0

3.0

2.0

1.0

0.0

+

–

ADJ/IN /IN

= 7V

V

= 7V

CC

V

CC

2.4

1.9

1.4

0.9

0.4

MR OPEN VOLTAGE 27°C

MR INPUT THRESHOLD 27°C

2.5

3.0

3.5

V

4.0

(V)

4.5

5.0

–50 –25

0

25

50

75 100 125

0.1

1

10

100

TEMPERATURE (°C)

COMPARATOR OVERDRIVE (%)

CC

2960 G04

2960 G05

2960 G06

ADJ, IN⁺, IN^–Threshold

vs Temperature

Voltage Output HIGH vs

Pull-Down Current (RST/OUT)

430

420

410

400

390

380

370

3.5

3.0

2.5

2.0

1.5

1.0

0.5

0

125°C

+

V

90°C

27°C

–45°C

HYS

V

RHYS

TH

–

V

HYS

=7V

CC

V

CC

=3.3V

DV

–50 –25

0

25

50

75 100 125

0

–0.2

–0.4

–0.6

–0.8

TEMPERATURE (°C)

PULL-DOWN CURRENT(mA)

2960 G07

2960 G08

Voltage Output HIGH vs

Pull-Down Current (RST/OUT)

Voltage Output LOW vs

Pull-Up Current (RST/OUT)

2.0

1.6

1.2

0.8

0.4

0

2.0

1.6

1.2

0.8

0.4

0

125°C

90°C

125°C

90°C

27°C

–45°C

=7V

CC

=7V

CC

V

CC

V

CC

=1.6V

=3.3V

DV

0

–20

–40

–60

–80

0

1

2

3

4

5

PULL-DOWN CURRENT(μA)

PULL-UP CURRENT (mA)

2960 G08

2960 G09

2960f

5

LTC2960

PIN FUNCTIONS

ADJ: Reset Threshold Adjustment Input. Tie to resistive

divider to configure desired reset threshold.

OUT: (LTC2960-1/LTC2960-3) Pulls low when monitored

+

voltage falls below the IN threshold. Released when

+

the IN voltage rises above its threshold by 5%. For the

DV : (LTC2960-3/LTC2960-4) Logic Supply Input. Used

CC

LTC2960-3, OUT is driven by DV when logic high. OUT

CC

for setting the logic swing of the RST and OUT outputs.

is open drain if DV is grounded. Leave open if unused.

CC

Useful for interfacing with logic voltages different from

(LTC2960-2/LTC2960-4)OUTpullslowwhenthemonitored

V . Bypass DV with 0.1μF to GND. Grounding DV

CC

–

voltage rises above the IN threshold. Released when

allows OUT and RST to act as open drain outputs.

–

monitoredvoltagefallsbelowIN thresholdby5%. Forthe

ExposedPad(DFNOnly):Exposedpadmaybeleftfloating

or connected to device ground.

LTC2960-4, OUT is driven to DV for a logic high. OUT

CC

is open drain if DV is grounded. Leave open if unused.

CC

GND: Device ground.

RST:ResetOutput. Pullslowwhenmonitoredvoltagefalls

below the reset (ADJ) threshold. RST is released after

monitored voltage exceeds the reset threshold plus 2.5%

hysteresis and after reset timeout period has expired. For

–

IN : (LTC2960-2/LTC2960-4) IN Threshold Adjustment

Input. Tie to resistive divider to configure required thresh-

old. Tie to GND if unused.

the LTC2960-3/LTC2960-4, RST is driven to DV for a

CC

+

IN : (LTC2960-1/LTC2960-3) IN Threshold Adjustment

Input. Tie to resistive divider to configure required thresh-

old. Tie to GND if unused.

logic high. RST is open drain if DV is grounded. Leave

CC

open if unused.

RT: (LTC2960-1/LTC2960-2) Reset Timeout Period Se-

MR: Manual Reset Input. Attach a push-button switch or

logic signal between this input and ground. A logic low

on this input pulls RST low. When the MR input returns to

logic high, RST returns high after a reset timeout period

has expired. Leave open if unused.

lection Input. Tie to GND for 15ms delay. Tie to V for

CC

200ms delay.

V : Power Supply Input. When V falls below the falling

CC

UVLO threshold, the outputs are pulled low. If V falls

CC

below 1.2V the logic state of the outputs cannot be guar-

anteed. Bypass V with 0.1μF to GND. Use appropriate

CC

voltage rating for bypass capacitor.

2960f

6

LTC2960

BLOCK DIAGRAM

RT

DV

CC

LTC2960-1/LTC2960-2

LTC2960-3/LTC2960-4

V

CC

400mV

REFERENCE

0.4V

REGULATOR

1μA

MR

RST

ADJ

–

+

RESET

DELAY

0.4V

LTC2960-2/LTC2960-4

OUT

+

–

+

–

IN (LTC2960-1/LTC2960-3)

IN (LTC2960-2/LTC2960-4)

LTC2960-1/LTC2960-3

GND

2960 BD

TIMING DIAGRAM

+

IN /OUT TIMING

+

V

+ V

TH

HYS

TH

V

+

V

IN

OUT

–

IN /OUT TIMING

V

HYS

TH

–

V

+ V

TH

–

V

IN

OUT

ADJ/RST TIMING

V

+ V

TH

RHYS

TH

V

t

V

ADJ

RST

MR

2960 TD

t

PD

2960f

7

LTC2960

APPLICATIONS INFORMATION

VOLTAGE MONITORING

THRESHOLD CONFIGURATION

TheLTC2960monitorsvoltageappliedtoitsinputsIN /IN

+

–

The LTC2960 is a voltage supervisor with a wide operating

voltagerangeupto36Vwithonly850nAquiescentcurrent.

The supervisor has two outputs, RST and OUT that pro-

vide voltage monitoring capabilities for system power-up,

power-downandbrown-outconditions. Built-inhysteresis

and a reset timeout period ensure that fluctuations due to

load transients or supply noise do not cause chattering

of the status outputs. The LTC2960 can provide reset and

voltage status signals to a microprocessor based system

or can alternatively be used as an Under Voltage Lock Out

(UVLO) for DC/DC switchers or LDOs for control over a

battery operated system.

andADJ.Aresistivedividerconnectedbetweenamonitored

voltage and ground is used to bias the inputs. Figure 1

demonstrateshowtheinputscanbemadedependentupon

a single voltage (V1). Only three resistors are required.

To calculate their values, specify desired falling reset (V )

R

+

and IN (V ) thresholds with V > V . For example:

IN

R

+

V

IN

= 6.4V, V = 6V

R

V1

LTC2960-1/

LTC2960-3

R3

ADJ

RST

If the monitored voltage drops below the reset threshold,

RST pulls low until the ADJ input rises above 0.4V plus

2.5% hysteresis. An internal reset timer delays the return

of the RST output to a high state to provide monitored

voltage settling and initialization time. The RST output is

typically connected to a processor reset input.

R2

R1

+

IN

OUT

2960 F01

+

IfthemonitoredsupplyvoltagefallstotheIN (LTC2960-1/

Figure 1. Configuration for Single Voltage Monitoring

LTC2960-3)threshold,thesparecomparatorpullsOUTlow.

+

OUT remains low until the IN input rises above 0.4V plus

The solution for R1, R2 and R3 provides three equations

and three unknowns. Maximum resistor size is governed

by maximum input leakage current. For the LTC2960,

the maximum input leakage current below 85°C is 1nA.

For a maximum error of 1% due to both input currents,

the resistor divider current should be at least 100 times

the sum of the leakage currents, or 0.2μA. At the reset

5% hysteresis. OUT is typically used to signal preparation

for controlled shutdown. For example, the OUT output

may be connected to a processor nonmaskable interrupt

(NMI). Upon interrupt, the processor begins shutdown

procedures such as supply sequencing and/or storage/

erasure of system state in nonvolatile memory.

–

If the monitored supply voltage rises to the IN threshold

threshold, V1 = 6V, R

= 8MΩ where:

SUM

(LTC2960-2/LTC2960-4), the spare comparator pulls OUT

–

R

= R1 + R2 + R3

SUM

low. OUT remains low until the IN falls below 0.4V minus

+

5% hysteresis. The LTC2960-2/LTC2960-4 operates as an

undervoltage and overvoltage monitor.

Both the falling reset and IN thresholds are 0.4V, so:

V_TH•R_SUM0.4V•8MΩ

R1=

=

= 500k

Few, ifany, externalcomponentsarenecessaryforreliable

V +

6.4V

IN

operation. However, a decoupling capacitor between V

CC

The closest 1% value is 499k. R2 can be determined

from:

and ground is recommended (0.01μF minimum). Use a

capacitor with a compatible voltage rating.

V_TH•R_SUM

0.4V • 8MΩ

R2 =

– R1=

– 499k

V_R

6V

R2 = 34.33k

2960f

8

LTC2960

APPLICATIONS INFORMATION

The closest 1% resistor value is 34k. R3 is easily obtained

from:

to a user defined voltage up to 36V with a resistor. The

open-drainpull-upvoltagemaybegreaterthanV .Select

CC

a resistor compatible with desired output rise time and

load current specifications. Figure 3 demonstrates typical

LTC2960-1 OUT output behavior. When the status outputs

are low, power is dissipated in the pull-up resistors.

R3 = R

– R1 – R2 = 8M – 499k – 34k

SUM

R3 = 7.467MΩ

The closest 1% resistor value is 7.5MΩ. Plugging the

standard values back into the equations yields the design

values for the falling reset and IN voltages:

7.5

+

6

+

V

= 6.4V, V

= 6.028V

IN

RST

Figure 2 demonstrates how the inputs can be biased

to monitor two voltages (V1, V2). In this example, four

resistors are required. Calculate each divider ratio for the

4.5

3

desired falling threshold (V ) using:

FT

1.5

0

RnB

RnA V_TH

V

FT

0.4V

FT

=

– 1=

– 1

0

1.5

3

4.5

(V)

6

7.5

In Figure 2, OUT is tied back to the MR input, making the

state of the RST output dependent upon both V1 and V2. If

V1 and V2 are both above the configured falling threshold

plushysteresis, RSTisallowedtopullhigh. Ifindependent

operation of the status outputs is desired, simply omit the

OUT and MR connection.

V

CC

2960 F03

Figure 3. OUT vs V_CC(LTC2960-1) Externally Configured for 6V

Threshold with RST Tied to V_CCThrough Pull-up Resistor

The outputs of both the LTC2960-3 and LTC2960-4 can be

configured as either low voltage active pull-up or open-

drain. This is done by tying the DV pin to either a supply

or GND. Using the active pull-up configuration, DV tied

V1

V2

CC

LTC2960-1/

R2B R1B

LTC2960-3

CC

to a supply, lowers power dissipation by eliminating the

static current drawn by pull-up resistors when the outputs

are low and improves output rise time. In Figure 4(a), an

LTC2960-3 has active pull-up outputs configured by tying

ADJ

RST

+

IN

OUT

MR

DV toa1.6Vto5.5Vsupply.InFigure4(b),theLTC2960-3

CC

2960 F02

R2A R1A

hasopen-drainoutputsconfiguredbytyingtheDV pinto

CC

ground. When DV is connected to ground both outputs

CC

are open-drain and pull-up resistors are required.

Figure 2. Dual Voltage Monitoring

Some applications require RST and/or OUT outputs to

be valid with V down to ground when DV is tied to

CC

V . Active pull-up satisfies this requirement with the ad-

CC

SELECTING OUTPUT LOGIC STYLE

dition of an optional external resistor from the output to

ground. The resistor provides a path for leakage currents,

preventing the output from floating to undetermined volt-

ages when connected to high impedance (such as CMOS

logicinputs). Theresistorvalueshouldbesmallenoughto

The LTC2960 status outputs are available in two options:

open-drain (LTC2960-1/LTC2960-2) or active pull-up with

theDV pinreplacingtheRTpin(LTC2960-3/LTC2960-4).

CC

The open-drain option allows the outputs to be pulled up

2960f

9

LTC2960

APPLICATIONS INFORMATION

provideeffectivepull-downwithoutexcessivelyloadingthe

pull-up circuitry. A 100k resistor from output to ground is

satisfactoryformostapplications.Whenthestatusoutputs

are high, power is dissipated in the pull-down resistors.

and MR is a solution to this issue. The MR input can be

pulled to 36V maximum and will not affect the internal

circuitry. Input MR is often pulled down through the use

of a pushbutton switch.

If V falls below the falling UVLO threshold, the outputs

CC

SELECTING THE RESET TIMEOUT PERIOD

are pulled to ground. The outputs are guaranteed to stay

lowforV ≥1.2Vregardlessoftheoutputlogicconfigura-

CC

UsetheRTinput(LTC2960-1/LTC2960-2)toselectbetween

two fixed reset timeout periods. Connect RT to ground for

tion. When V < 1.2V, the active pull-up output behaves

CC

similarly to an open-drain output with a pull-up resistor.

a 15ms timeout. Connect RT to V for a 200ms timeout.

CC

The reset timeout period occurs after the ADJ input is

drivenabovethresholdandtheMRinputtransitionsabove

its logic threshold. After the reset timeout period, the RST

output is allowed to pull up to a high state as shown in

LTC2960-3

DV

CC

1.6V TO 5.5V

Figure 5. The RT input is replaced by the DV input in

CC

0.4V

OUT

+

–

the LTC2960-3/LTC2960-4 options and the reset timeout

period defaults to 200ms.

+

IN

ADJ

(a). PUSH-PULL CONFIGURATION

LTC2960-3

15ms

RST, RT = GND

DV

CC

200ms

6.3V MAX

RST, RT = V

CC

2960 F05

0.4V

OUT

+

–

Figure 5. Selectable Reset Timeout Period

+

IN

EXTERNAL HYSTERESIS

+

2960 F04

The LTC2960 IN comparator hysteresis is 20mV (V

),

HYS

(b). OPEN-DRAIN CONFIGURATION

or 5% referred to V . Certain applications require more

TH

Figure 4. LTC2960-3 (LTC2960-4) RST and OUT Outputs are

than the built-in native hysteresis. The application sche-

matic in Figure 6 adds one additional resistor (R6) to a

typical attenuator network. The procedure below is used

to determine a value for R6 to provide an increase over

the native hystereis. In this example, it is desired to double

the native hysteresis from 300mV to 600mV and achieve

a falling threshold of 6V.

Configurable as Push-Pull or Open-Drain

MANUAL RESET INPUT

When ADJ is above its reset threshold and the manual

reset input (MR) is pulled low, the RST output is forced

low. RSTremainslowfortheselectedresettimeoutperiod

after the manual reset input is released and pulled high.

The manual reset input is pulled up internally through a

1μA current source to an internal bias voltage (see Elec-

trical Characteristics). If external leakage currents have

the ability to pull down the manual reset input below its

Before including R6, the rising threshold (V ) is 6.293V

R

while the falling threshold (V ) is 5.993V. The hysteresis

F

referred to V is calculated from:

A

R4

R5

⎛

⎞

V_{HYST VA}₎= V

1+

=20mV•15 = 300mV

⎜

⎝

⎟

⎠

(

PHYS

logic threshold, a pull-up resistor placed between V

CC

2960f

10

LTC2960

APPLICATIONS INFORMATION

V

The falling threshold can be restored to the original value

by reducing the value of R5. Under the assumption that

the addition of R6 has a negligible impact on the rising

threshold, a new R4/R5 ratio can be calculated as shown:

A

B

LTC2960-3

DV

R4

681k

CC

R4

R5

V_R

6.6V

=

– 1=

– 1= 14.71

V_TH+ V⁺

+

IN

OUT

420mV

(

)

HYS

R5

48.7k

R6

6.81M

Given the ratio of R4/R5, the closest 1% resistor value for

R5 is 46.4k. With the actual resistor values now known,

the final thresholds can be calculated by plugging the

2960 F06

values into the equations above for V and V to obtain:

R

F

Figure 6. External Hysteresis

V_R= 6.626V, V = 6.010V, V

= 616mV

F

HYST

The addition of R6 allows OUT to sink or source current

+

As a result of the added current component through R6

an error term exists that is a function of the pull-up volt-

to the summing junction at IN . Neglecting internal switch

resistances and providing that R6 >> R5, the externally

age, V in Figure 6.

modified hysteresis (referred to V ) becomes:

B

A

R4

R6

⎛

⎞

Operation with Supply Transients over 40V and Hot

Swapping

V_HEXT≈ V_HYS(VA)+ V

⎜

⎝

⎟

⎠

B

Since the amount of hysteresis is to be doubled, the

second term in the above expression needs to be about

The circuit in Figure 7(a) allows the LTC2960 to withstand

high voltage transients. The magnitude of the voltage

transients that can be absorbed is set by the voltage rat-

ing of RZ. A TT-IRC pulse-withstanding surface mount

1206 resistor with a nominal voltage rating of 200V is

used. The external 30V Zener diode (Z1) and the 143kΩ

300mV. With a logic supply, V , equal to 3V, the ratio R4/

B

R6 should be about 0.1. Choosing R6 to be 6.81M satis-

fies the design criteria.

TheadditionofR6modifiestherisingandfallingthresholds

originally determined by R4 and R5. The modified rising

threshold becomes:

current limiting resistor (RZ) protect the V supply pin

IN

of the LTC2960. Note that there is a speed penalty which

is the time constant determined by RZ and C1, 14.3ms in

⎛

⎞

⎟

⎠

R4 R4

+

this example. If V is below 30V, there is a voltage drop

V = V + V

• 1+

+

IN

⎜

R

(

TH

)

HYS

⎝

R5 R6

across RZ that is dependent on the quiescent current of

the LTC2960 which is nominally less than 150mV but can

be as high as 290mV if MR is pulled low. The maximum

= 400mV + 20mV • 1+ 13.98 + 0.1

(

) (

)

voltage drop is determined by the maximum specified I

CC

= 6.3336V

and MR pull-up currents. For conditions where the Zener

conducts current, it can be biased in the microamp range

owing to the low quiescent current of the LTC2960. For a

It is apparent that the R4/R6 term does not affect the ris-

ing threshold significantly resulting in a change of only

+0.645%. The falling threshold incorporating R6 is:

supply voltage of 150V, the Zener is biased <1mA. When

+

input pins are used to sense V , the input pins ADJ/IN /

IN

–

⎛

⎞

⎛

⎞

R4 R4 V_TH– V

IN absolutemaximumratingof3.5Vmustnotbeexceeded.

B

V = V_TH1+

+

F

⎜

⎟

⎠

⎜

⎟

V can be a maximum of 8.75x the lowest programmed

R5 R6 ⎝ V_TH

IN

⎝

⎠

threshold to satisfy this condition. For a maximum V of

IN

150V, the lowest programmable threshold is >17V.

= 0.4V • 1+ 13.98 – 0.65 = 5.732V

(

)

2960f

11

LTC2960

APPLICATIONS INFORMATION

V

MAX 200V

When a supply voltage is abruptly connected to the input

resonantringingcanoccurasaresultofseriesinductance.

The peak voltage could rise to 2x the input supply but in

practice can reach 2.5x if a capacitor with a strong volt-

age coefficient is present. If a 12V supply is hot plugged

IN

RZ

143k

PWC1206LF143kJ*

V

CC

Z1

C1

0.1μF

50V

LTC2960

*TT-IRC

BZX84C30

BV = 30V

the resulting ringing could reach the abs max of V . Any

CC

circuit with an input of more than 7V should be scrutinized

for ringing. Circuit board trace inductances of as little as

10nH can produce significant ringing.

(a)

V

IN

RS

20

One effective means to eliminate ringing is to include a

10–100Ω resistance in series with the supply input before

V

CC

theV capacitorshowninFigure7(b).Thisprovidesdamp-

C1

0.1μF

50V

CC

LTC2960

ing for the resonant circuit but imposes a time constant to

V . In Figure 7(b), the time constant of RS and C1 is 2μs.

CC

2960 F07

(b)

Figure 7. Operation with High Voltage Transients

and Hot Swapping

TYPICAL APPLICATIONS

Configurable Regulator UVLO and Low Battery

Indicator

internal switch when it reaches 2.5V. With a threshold of

5.537V the LTC2960 OUT output disables the load before

this occurs in order to prevent damage to the batteries.

In addition to the UVLO signal, the LTC2960 provides a

low battery indicator for the system. Figure 9 shows an

alternative arrangement in which the LTC2960 monitors

the output of the 3.3V regulator to provide a reset signal.

In the circuit of Figure 8, the high voltage open drain

OUT output is used as a configurable UVLO signal for a

switching regulator. A Li-Ion battery can contain protec-

tion circuitry that open circuits its terminals through an

BUCK CONVERTER

V

NOT ALL LT3991 COMPONENTS SHOWN

BAT

6V TO 8.4V

V

OUT

V

IN

OUT

3.3V

R3

R4

10M

LT3991

C2

5.11M*

R5

1M

+

EN

47μF

16V

Li-Ion

4.2V

V

GND

C1

0.1μF

25V

CC

RT

IN

OUT

+

R2

49.9k

LTC2960-1

Li-Ion

4.2V

ADJ

RST

LOW BATTERY

MR

R1

348k

GND

2960 F08

UVLO FALLING THRESHOLD = 5.537V

RESET FALLING THRESHOLD = 6.33V

*VISHAY-DALE CRCW SERIES 0603 1%

Figure 8. Configurable Regulator UVLO and Low Battery Indicator

2960f

12

LTC2960

TYPICAL APPLICATIONS

BUCK CONVERTER

V

BAT

NOT ALL LT3991 COMPONENTS SHOWN

6V TO 8.4V

V

OUT

V

IN

OUT

3.3V

R5

10M

R2

+

LT3991

C2

Li-Ion

4.2V

6.04M

R4

R6

1M

EN

47μF

16V

V

C1

0.1μF

25V

CC

2.26M

RT

OUT

GND

LTC2960-1

+

IN

MR

ADJ

Li-Ion

4.2V

RST

RESET

R1

402k

R

*

GND

ESD

R3

402k

10k

2960 F09

UVLO FALLING THRESHOLD = 6.410V

RESET FALLING THRESHOLD = 2.649V

*OPTIONAL RESISTOR FOR ADDED ESD PROTECTION

Figure 9. Configurable Regulator UVLO and Supervisor

M2

Si4435

M1

Si4435

V

BAT

6V TO 8.4V

V

OUT

R8

10k

1N5245

15V

R7

1M

+

Li-Ion

4.2V

R2

5.6M*

R6

100k

R4

6.04M*

R5

10M

V

RT

C1

0.1μF

25V

CC

OUT

ADJ

LTC2960-2

–

+

–

Li-Ion

4.2V

IN

RST

LOW BATTERY

R1

402k*

R3

402k*

MR

GND

2960 F10

IN FALLING THRESHOLD = 5.974V

ADJ FALLING THRESHOLD = 6.410V

*VISHAY-DALE CRCW SERIES 0603 1 %

Figure 10. Battery Disconnect to Protect Against Deep Discharge

BUCK CONVERTER

V

NOT ALL LT3991 COMPONENTS SHOWN

IN

IRLR2908

4V TO 27V

12V

VEHICLE BATTERY

V

OUT

V

IN

V

OUT

3.3V

R8

R2

R7

1M

R4

R6

6.04M

LT3991

GND

102k

825k

1.78M

C2

EN/SS

FB

22μF

25V

V

GATE OUT

FB

CC

R3

1M

V

DV

CC

+

C1

1μF

50V

LT4356

IN

ADJ

LTC2960-3

FLT

OUT

RST

UV

OV

GND

R7

4.99k

R1

80.6k

R5

1M

MR

GND

2960 F11

+

IN FALLING THRESHOLD = 4.49V

ADJ FALLING THRESHOLD = 2.816V

Figure 11. Automotive Supervisor

2960f

13

LTC2960

TYPICAL APPLICATIONS

The LTC2960-2 in Figure 10 is yet another way to prevent

excessive discharge of a battery. The high voltage OUT

output is used to drive the gate of a PMOS switch to in-

Micropower Power Supply Sequencer and Supervisor

Figure 13 illustrates multiple uses for the LTC2960 in a

power supply system. U1 is a power supply sequencer

terrupt the path to V

in the event of an undervoltage

+

OUT

whose IN input monitors V and enables the 5V switch-

IN

condition. When the battery stack voltage is above the

ing regulator. The ADJ input monitors the output of the

5V switching regulator and enables the 1.8V LDO after a

16ms Reset Timeout Period. U2 is a supervisor monitor-

ing the 5V and 1.8V outputs. The OUT output by virtue

of the MR pin, keeps the RST output low until the 1.8V

supply is ready.

–

IN rising threshold of 5.972V, the PMOS switch is turned

on. The LTC2960-2 also supervises V

to provide a low

OUT

batterysignalasanearlywarningofimpendingshutdown.

A 10k resistor is included in series with the V pin to limit

CC

current in the event of a reverse battery condition. In all

three examples, the load drops to <2.5μA typically and

excessive battery drain is prevented.

V

OUT

V

IN

V

OUT

LT3009-5

SHDN

IN

5V

16.4V

C2

1μF

16V

R3B

R4

10k

20mA MAX

118k*

Automotive Supervisor (LTC2960 H-Grade)

R3A

7.32M*

GND

The circuit in Figure 11 uses the LTC2960-3 (H-grade) as a

lowvoltagesupervisorcapableofoperatingintemperatures

upto125°Cinautomotiveenvironments.TheLT4356surge

V

CC

C1

0.1μF

50V

DV

CC

ADJ

stopper limits V to 27V under the alternator load dump

IN

R2

68k*

LTC2960-4

–

condition. The LT3991 buck regulator in conjunction with

the LTC2960 draw <10μA quiescent current for no load,

which limits the drain on the vehicle battery even after

long periods of inactivity.

IN

RST

FAULT

OUT

MR

R1

182k*

GND

2960 F12

Window Comparator for High Voltage Input

UPPER THRESHOLD = 16.897V

LOWER THRESHOLD = 12.3V

*VISHAY-DALE CRCW SERIES 0603 1%

The LTC2960-4 can be configured as a window compara-

tor to monitor high voltage supplies or battery stacks as

Figure 12. Window Comparator for High Voltage Input

shown in Figure 12. A fault signal is generated if V is out

IN

ofregulation. TheOUToutputoftheLTC2960-4isfedback

into the MR input to drive the RST output. A micropower

LDO provides bias to the active pull-up DV supply for

CC

low static current draw in the outputs.

2960f

14

LTC2960

PACKAGE DESCRIPTION

Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.

DC8 Package

8-Lead Plastic DFN (2mm × 2mm)

(Reference LTC DWG # 05-08-1719 Rev A)

R = 0.115

TYP

5

8

R = 0.05

0.70 0.05

TYP

0.40 0.10

2.55 0.05

1.15 0.05

2.00 0.10 0.64 0.10

(4 SIDES)

(2 SIDES)

0.64 0.05

(2 SIDES)

PIN 1 NOTCH

R = 0.20 OR

0.25 × 45°

PIN 1 BAR

TOP MARK

(SEE NOTE 6)

PACKAGE

OUTLINE

CHAMFER

(DC8) DFN 0409 REVA

4

1

0.23 0.05

0.45 BSC

0.25 0.05

0.45 BSC

0.75 0.05

0.200 REF

1.37 0.10

(2 SIDES)

1.37 0.05

(2 SIDES)

BOTTOM VIEW—EXPOSED PAD

0.00 – 0.05

RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS

APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED

NOTE:

4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE

MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE

5. EXPOSED PAD SHALL BE SOLDER PLATED

6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE

TOP AND BOTTOM OF PACKAGE

1. DRAWING IS NOT A JEDEC PACKAGE OUTLINE

2. DRAWING NOT TO SCALE

3. ALL DIMENSIONS ARE IN MILLIMETERS

TS8 Package

8-Lead Plastic TSOT-23

(Reference LTC DWG # 05-08-1637 Rev A)

2.90 BSC

(NOTE 4)

0.40

MAX

0.65

REF

1.22 REF

1.50 – 1.75

(NOTE 4)

2.80 BSC

1.4 MIN

3.85 MAX 2.62 REF

PIN ONE ID

RECOMMENDED SOLDER PAD LAYOUT

PER IPC CALCULATOR

0.22 – 0.36

8 PLCS (NOTE 3)

0.65 BSC

0.80 – 0.90

0.20 BSC

DATUM ‘A’

0.01 – 0.10

1.00 MAX

0.30 – 0.50 REF

1.95 BSC

TS8 TSOT-23 0710 REV A

0.09 – 0.20

(NOTE 3)

NOTE:

1. DIMENSIONS ARE IN MILLIMETERS

2. DRAWING NOT TO SCALE

4. DIMENSIONS ARE EXCLUSIVE OF MOLD FLASH AND METAL BURR

5. MOLD FLASH SHALL NOT EXCEED 0.254mm

3. DIMENSIONS ARE INCLUSIVE OF PLATING 6. JEDEC PACKAGE REFERENCE IS MO-193

2960f

Information furnished by Linear Technology Corporation is believed to be accurate and reliable.

However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-

tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.

15

LTC2960

TYPICAL APPLICATION

BUCK CONVERTER

NOT ALL LT3991 COMPONENTS SHOWN

5V

V

6.6V < V < 36V

IN

V

OUT

IN

OUTPUT

R3

10M

C2

47μF

16V

R2

6.04M

LT3991

EN

R5

3.48M

LTC2960-1

GND

1.8V

V

OUT

ADJ

C1

0.1μF

25V

CC

+

IN

OUT

LT3009-1.8

OUTPUT

R6

1M

C3

IN

SHDN

1μF

15ms DELAY

RST

GND

10V

U1

R8

1.3M

R4

402k

R1

402k

MR

RT

GND

R9

1M

LTC2960-1

V

CC

RT

ADJ

+

U2 IN

V

SUPPLY UVLO = 6.410V

IN

200ms DELAY

1.8V SUPPLY UVLO = 3.863V

RESET THRESHOLD = 1.693V

OUT RST

RST

MR

R7

402k

GND

2960 F14

Figure 13. Micropower Power Supply Sequencer and Supervisor

RELATED PARTS

PART NUMBER

LTC1326

DESCRIPTION

COMMENTS

Micropower Triple Supply Monitor for 5V/2.5V, 3.3V and ADJ

Micropower Triple Supply Monitor for 2.5V/5V, 3.3V and ADJ

Micropower Triple Supply Monitor with Open-Drain Reset

Micropower Triple Supply Monitor with Push-Pull Reset Output

4.725V, 3.118V, 1V Threshold ( 0.75%) and ADJ

Adjustable Reset and Watchdog Timeouts

Individual Monitor Outputs in MSOP

5-Lead SOT-23 Package

LTC1726

LTC1727

LTC1728

LTC1985

5-Lead SOT-23 Package

LTC2900/LTC2901/ Programmable Quad Supply Monitor

LTC2902

Adjustable Reset, Watchdog Timer and Tolerance, 10-Lead

MSOP and DFN Packages

LTC2903

Precision Quad Supply Monitor

6-Lead SOT-23 and DFN Packages

8-Lead SOT-23 and DFN Packages

LTC2904/LTC2905/ Three-State Programmable Precision Dual Supply Monitor

LTC2906/LTC2907

LTC2908

LTC2909

Precision Six-Supply Monitor (Four Fixed and Two Adjustable)

8-Lead SOT-23 and DFN Packages

Precision Triple/Dual Input UV, OV and Negative Voltage Monitor

Shunt Regulated V Pin, Adjustable Threshold and Reset,

CC

8-Lead SOT-23 and DFN Packages

LTC2910

Octal Positive/Negative Voltage Monitor

Separate V Pin, Eight Inputs, Up to Two Negative Monitors

CC

Adjustable Reset Timer, 16-Lead SSOP and DFN Packages

LTC2912/LTC2913/ Single/Dual/Quad UV and OV Voltage Monitors

LTC2914

Separate V Pin, Adjustable Reset Timer

CC

LTC2915/LTC2916/ Single Voltage Supervisors with 27 Pin-Selectable Thresholds

LTC2917/LTC2918

Manual Reset and Watchdog Functions, 8- and 10-Lead

TSOT-23, MSOP and DFN Packages

LTC2934

Ultralow Power Supervisor with ADJ and PFI Inputs

500nA Quiescent Current, 2mm × 2mm 8-Lead DFN and

TSOT-23 Packages

LTC2935

Ultralow Power Supervisor with Eight Pin-Selectable Thresholds

500nA Quiescent Current, 2mm × 2mm 8-Lead DFN and

TSOT-23 Packages

2960f

LT 0312 • PRINTED IN USA

LinearTechnology Corporation

1630 McCarthy Blvd., Milpitas, CA 95035-7417

16

●

(408) 432-1900 FAX: (408) 434-0507 www.linear.com


型号：	LTC2900
厂家：	Linear Systems
描述：	36V Nano-Current Two Input Voltage Monitor 36V纳米双电流输入电压监视器监视器
文件：	总16页 (文件大小：237K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

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